Study on the degradation of electron and hole's surface mobility by $Si/SiO_2$ interface roughness$Si/SiO_2$ 경계면의 surface roughness 에 의한 전자 및 정공의 표면 이동도 감소에 대한 연구

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We compared the surface mobilities of devices with different gate oxidation condition(i.e., differente oxidation temperature, growth rate, oxidation mechanism and additional post oxidation anneal). But only negligimobility degradation by surface roughness is thought to be processindependent. In addition, surface roughness parameters(rms height and correlation length of the roughness; $\Delta$,L) calculated from mobility curve are very close to the intrinsic crystallographic asperity. These results strongly suggests that surface roughness causing the mobility degradation at high field should be considered as intrinsic crystallographic asperity, and the universal relation between the surface mobility and effective field holds for surface roughness scattering limited region as well as phonon scattering limited region. But for clear conclusions, further study on the mobilities of the devices having different crystallographic asperities(c.e., different wafer orientations) is required and careful investigations on the morphology of the Si/$SiO_2$ interface by high resolution electron microscopy (HTEM) should be done along the study.
Advisors
Kim, Choong-KiLee, Kwy-Ro김충기이귀로
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1990
Identifier
67399/325007 / 000881248
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1990.8, [ [ii], 54, [2] p. ]

URI
http://hdl.handle.net/10203/37962
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=67399&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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