SystemC-based HW/SW Co-simulation environment for early performance estimation

Abstract

C/C++-based languages such as SystemC or SpecC can be used for both hardware and software description by raising the level of abstraction for hardware. This thesis proposes techniques for fast and accurate high-level co-simulation for multi-thread and multi-processor SoC design using SystemC for hardware and legacy C with RTOS(Real-Time Operating System) API for software. Automatically annotated legacy C synchronizes with SystemC clock events, and communicates with other modules through IO(Input/Output) variables and transaction level bus models. Generic RTOS scheduler and POSIX(Portable Operating System Interface) APIs are also provided for the real-time application. Designers can also easily apply the co-simulation framework to SoC design without troublesome re-writing or refinement to lower abstraction level, because the co-simulation frame is automatically constructed without additional efforts. About five or six times faster co-simulation speed than the ISS-based co-simulation along with various profiling data with 98% accuracy was achieved.