DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, In-Cheol | - |
dc.contributor.advisor | 박인철 | - |
dc.contributor.author | Rizwan, Shahid | - |
dc.contributor.author | 리즈완, 샤히드 | - |
dc.date.accessioned | 2011-12-14T01:54:30Z | - |
dc.date.available | 2011-12-14T01:54:30Z | - |
dc.date.issued | 2005 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=243659&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/37841 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2005.2, [ vi, 67 p. ] | - |
dc.description.abstract | Reed-Solomon code is a linear systematic block code based on finite field theory. The systematic format, the efficient encoding/decoding algorithm, and the powerful random/burst error correction capability of the code make it one of the most widely used error correction code in the industry. In RS decoders, the throughput bottleneck is the key equation solver (KES) block. We have adopted the Berlekamp-Massey (BM) algorithm for solving the key equation because it leads to more efficient hardware and software implementation. Because of the presence of feed back signals in the original BM algorithm it is hard to pipeline this block to improve the speed. We have proposed a retimed decomposed inversion less serial BM architecture that improves the speed and throughput by almost 76%. This improvement has been achieved at the expense of some extra registers. The key ideas include, the updating of the error locator polynomial and the discrepancy value computation in parallel in 2t + 2 cycles per iteration plus using the retiming technique to achieve a high speed architecture. In addition standard basis irregular fully parallel multiplier with separate partial product generation (PPG) and partial product reduction (PPR) stages has been used in our design, which leads to improved performance. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Berlekamp-Massey algorithm | - |
dc.subject | Read-solomon decoder | - |
dc.subject | Block coding | - |
dc.subject | Retiming | - |
dc.subject | 시간조정 | - |
dc.subject | 알고리즘 | - |
dc.subject | 리드솔로몬디코딩 | - |
dc.subject | 블록코딩 | - |
dc.title | Retimed decomposed serial berlekamp-massey architecture for high-speed reed-solomon decoding | - |
dc.title.alternative | 고속 리드 솔로몬 디코딩을 위한 시간 조정되고 분해된 직렬 Berlekamp-Massey 구조 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 243659/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 020034312 | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.localauthor | 박인철 | - |
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