(A) design of generic memory model for verification system검증 시스템을 위한 통합 메모리 모델의 설계

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 501
  • Download : 0
The memory plays an important role in today’s system design. And it is also important in verifying the system design. There are many types of memory. Designers want to use various kinds of memory. But most verification system, it is hard to attach more than one memory module because a memory which has large capacity also occupies large space in verification hardware. In this thesis, a generic memory model which supports diverse memory types such as ROM, flash memory, SSRAM and SDRAM is designed. The bit width of data and address range are configurable by adjusting the relevant parameters. Nonvolatile memory type is also implemented with SDRAM by using the storage device of PC. Experimental results show how designers use this memory and its performance.
Advisors
Kyung, Chong-Minresearcher경종민researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2004
Identifier
238490/325007  / 020023671
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2004.2, [ v, 54 p. ]

Keywords

VERIFICATION; MEMORY MODEL; MEMORY; VERIFICATION SYSTEM; 검증 시스템; 검증; 메모리 모델; 메모리; FPGA

URI
http://hdl.handle.net/10203/37813
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=238490&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0