시스템 추상화 수준에 따른 명세 개선 기법을 이용한 DEVS 시뮬레이터 개발Development of DEVS simulator using specification refinement at abstract levels of system

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dc.contributor.advisor김탁곤-
dc.contributor.advisorKim, Tag-Gon-
dc.contributor.author홍수연-
dc.contributor.authorHong, Su-Youn-
dc.date.accessioned2011-12-14T01:54:00Z-
dc.date.available2011-12-14T01:54:00Z-
dc.date.issued2004-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=238487&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/37810-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2004.2 , [ 58 p. ]-
dc.languagekor-
dc.publisher한국과학기술원-
dc.subject명세 개선 기법-
dc.subject시스템 모델링-
dc.subjectSYSTEM MODELING-
dc.subjectSPECIFICATION REFINEMENT-
dc.title시스템 추상화 수준에 따른 명세 개선 기법을 이용한 DEVS 시뮬레이터 개발-
dc.title.alternativeDevelopment of DEVS simulator using specification refinement at abstract levels of system-
dc.typeThesis(Master)-
dc.identifier.CNRN238487/325007 -
dc.description.department한국과학기술원 : 전기및전자공학전공, -
dc.identifier.uid020023664-
dc.contributor.localauthor김탁곤-
dc.contributor.localauthorKim, Tag-Gon-
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EE-Theses_Master(석사논문)
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