Implementation of hardware/software co-monitoing system in behavioral emulator

Abstract

With system designs now well over one million gates, the verification process using HDL has become the bottleneck on the design progress. As a result, the needs for behavioral emulation to verify the functionality of a design at the early stage on the design flow have increased. So, we have developed a behavioral emulator, in-System Algorithm Verification Engine (iSAVE), which makes designers be able to emulate a chip model described in high-level languages such as C, C++ and SystemC instead of HDL. In the thesis, we propose an implementation of iAnalyzer, which is hardware and software co-monitoring system in iSAVE. iAnalyzer system consists of Pin Signal Acquisition (PSA) for sampling hardware pin signals and Software Variable Acquisition (SVA) for acquiring software variables in C-algorithm. iAnalyzer provides high sampling rate to monitor hardware pin signals, sufficient tracing depth to store the sampled data for a long period, and flexible triggering functions to provide various triggering conditions. iAnalyzer system also supplies a synchronization mechanism between PSA and SVA. Finally, we experimented on iAnalyzer with the emulation of MPEG2 decoding algorithm and image processing algorithms.