Real-traffic based simulation environment for gigabit switch chipset

Abstract

This paper describes a real-time simulation method based on the use of real network traffic to verify gigabit switch chipset functionally. Gigabit Ethernet switch system is supposed to meet 1Gbps bandwidth per port. Usually functional verification has to be performed through all design stages, but in early design stages when we have only premature RTL HDL code, it is difficult to emulate a system since we don``t have any hardware. In this environment to be suggested, a workstation with multiple NIC``s emulate a switch. Internally, Verilog RT-level code is processed by Verilog simulator and other routines required are processed by C programming language. Therefore, this simulation environment provides not only a good method for verifying premature RT-level designs, but also a testbed for embedded software development.