고속 Row-cycle이 가능한 VPM(virtual pipelined memory) 구조에 대한 연구A study on VPM(virtual pipelined memory) architeture for a fast row-cycle DRAM

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Advisors
유회준researcherYoo, Hoi-Junresearcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1999
Identifier
150886/325007 / 000973450
Language
kor
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1999.2, [ [v], 71 p. ]

Keywords

버추얼채널메모리; 행경로 파이프라인; 디램; 성능분석기; Performance analyzer; VCM; Row pipeline; DRAM

URI
http://hdl.handle.net/10203/37197
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=150886&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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