Design of a CMOS active mixer with a differential NMOS load

Abstract

In this thesis, a differential NMOS load with a small PMOS current source is proposed as an appropriate input stage for a CMOS passive mixer with analyses, design steps, and simulation results. The designed mixer has good characteristics of both a passive mixer and an active mixer. The designed mixer operating at 1.8GHz has a IIP3 of 3dBm, a 1dB compression point of -8dBm, a power conversion gain of 6dB, and a SSB noise figure of 7.3dB in HPADS simulations. The input stage draws 24mW a 3V supply also in simulations. The designed mixer is layouted in the LG 0.6um CMOS process. Finally, some future works were presented.