Bisimulation has been used as a logical verification method for the algebra-based formalisms such as CCS and CSP. It is an equivalence concept between two systems. The fact that two systems are bisimilar means that their I/O behaviors are same. If any event sequence can be observed from one system, then the same event sequence should be observed from the other system too.
Though Bisimulation is a powerful and generally used verification method, there is a big problem, ``State Explosion``. If a system becomes larger than a specific limit, the state space of the system increases explosively and makes verification beyond the computational power. This is the main reason why the bisimulation method is not used widespread in the real industry. There have been several approaches to solve this problem and still being researched. This thesis proposes a hierarchical bisimulation as a solution for the state explosion.
The hierarchical bisimulation takes the divide-and-conquer approach. Trying to compute the overall verification at once results in the state explosion. If the verification can be divided into several parts and computed part-by-part, the state explosion won``t happen. DEVS formalism supports this approach. DEVS formalism describes a system in a hierarchical and modular style, which the hierarchical bisimulation takes advantage of. The hierarchical bisimulation is an equivalence relation between two systems with respect to the overall hierarchy and component modules. If the overall hierarchy is preserved the module-by-module verification guarantees the overall equivalence, which means that the overall verification can be divided into several module-by-module verification and the state explosion problem can be solved.
This thesis proposes several frameworks that support the hierarchical bisimulation. We propose two formalisms based on the DEVS formalism as modeling methodologies and present two equivalence concepts for the proposed formalisms. Last, we propo...