VLIW 프로세서의 효율적인 Prefetch 구조의 설계The design of effective prefetch structure for VLIW processor
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 김이섭 | - |
| dc.contributor.advisor | Kim, Lee-Sup | - |
| dc.contributor.author | 한경남 | - |
| dc.contributor.author | Han, Kyung-Nam | - |
| dc.date.accessioned | 2011-12-14T01:40:53Z | - |
| dc.date.available | 2011-12-14T01:40:53Z | - |
| dc.date.issued | 1997 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114279&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/36977 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1997.2, [ iii, 76 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.subject | VLIW | - |
| dc.subject | 프리페치 | - |
| dc.subject | 메모리 | - |
| dc.subject | D램 | - |
| dc.subject | 캐쉬 | - |
| dc.subject | Cache | - |
| dc.subject | VLIW | - |
| dc.subject | Prefetch | - |
| dc.subject | Memory | - |
| dc.subject | DRAM | - |
| dc.title | VLIW 프로세서의 효율적인 Prefetch 구조의 설계 | - |
| dc.title.alternative | The design of effective prefetch structure for VLIW processor | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 114279/325007 | - |
| dc.description.department | 한국과학기술원 : 전기및전자공학과, | - |
| dc.identifier.uid | 000957062 | - |
| dc.contributor.localauthor | 김이섭 | - |
| dc.contributor.localauthor | Kim, Lee-Sup | - |
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- EE-Theses_Master(석사논문)
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