학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1996.8, [ vii, 91 p. ]
합성가능한 VHDL; HDEVS 형식론; 하드웨어 모델링; DEVS 형식론; VHDL Code 자동 생성; VHDL code Generation; Synthesizable VHDL; HDEVS formalism; Hardware modeling; DEVS formalism
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