Area-efficient multi-mode decoder architecture for quasi-cyclic LDPC codes in mobile WiMAX system

Abstract

This thesis presents an area-efficient multi-mode decoder architecture employing the layered decoding algorithm for Quasi-Cyclic LDPC codes for Mobile WiMAX system. This architecture can be operated in all kinds of modes specified in Mobile WiMAX system. The main contribution of this work is a significant reduction of memory and interconnects requirement of the decoder. At the architecture level, the decoder is based on the partial-parallel architecture, in which multiple decoding function units (DFUs) are implemented to process blocks of non-overlapping check nodes in parallel. The computation in a DFU can be performed in parallel with 8 row weights; therefore the DFUs operate in parallel with row weights of 6/7 for code rate 1/2 or in partial-parallel with for other code rates (2/3 A, 2/3 B, 3/4 A, 3/4 B, 5/6) Although the maximum parallelism factor of WiMAX code is 96, our LDPC decoder employs only a subset of 4 DFUs because the throughput requirement of Mobile WiMAX system is 30 Mbps and 4 is common divisor of the all sub-matrix size. By both utilizing 4 DFUs and changing the processing sequence, the flexible permuter is not needed and the word alignment is removed, which can reduce a lot of area of the router. In addition, DFUs have 100% hardware utilization ratio during decoding process for all codeword length. Based on the APP data partitioning applied to APP memory organization, the distribution network in the router is removed, and the number of memory instances is reduced. Instead of two-port memory, the decoder uses two single port memories each of which has half entries. Moreover, the check-to-variable messages are stored in compressed form to reduce a memory requirement. The proposed LDPC decoder for rate 1/2 is implemented in Verilog HDL and synthesized using a TSMC $0.25\microm$ standard cell library. An overall complexity of 33K logic gates is measured, plus 38,016bits RAM. The decoding throughput can achieve 70.67Mbps at the clock frequenc...