Charge recycling differential logic for low power VLSI system

Abstract

Energy efficiency has become one of the most important concerns in VLSI design. In this paper, a new type of logic circuit, called Charge Recycling Differential Logic (CRDL), has been proposed to meet the requirement of low-power electronic devices. CRDL improves power efficiency by utilizing a charge recycling technique, while keeping the speed comparable to that of conventional dynamic circuit techniques. Besides the power-efficient operation, this logic family has several interesting advantages. Firstly, CRDL is inherently a static logic although the operation of this circuit is based on precharging action like the conventional dynamic logic circuits. Thus, it has an improved noise margin, and eliminates problems due to the existence of dynamic nodes. In addition, the operation of CRDL causes less di/dt noise on the supply lines as compared with that of the conventional precharge schemes, since it uses internally stored charges for operations instead of drawing them from outside. Synchronous and asynchronous pipeline configurations with CRDL are also introduced with a set of additional advantages over conventional pipeline structures. First of all, when a true single-phase-clock latch (TSPC) is connected to the output of a CRDL circuit, an inherent noise margin problem due to the internal dynamic node in the TSPC latch is eliminated without any additional device. Two static latches, newly proposed in this paper to be used with the proposed logic circuit, have a better performance than the conventional transmission gate latch. Moreover, a synchronous pipeline configuration implemented using CRDL with novel latches is shown to be safely operated by a single-phase clocking scheme. The timing analysis of this configuration for reliable operations has also been addressed. An asynchronous pipeline configuration with CRDL eliminates the need for completion detectors which are usually attached at the output of a function block in conventional configurations, further...