Design and performance analysis of high-speed ATM switches with large capacity

Abstract

Public asynchronous transfer mode (ATM) based broadband integrated service digital network (B-ISDN) will provide a service platform for visual, intelligent, and personal communication services. Here ATM switch fabric is especially important to construct the ATM networks. Recently, research and development for realizing practical ATM switching systems have been active worldwide. However, no practical judgement as to which switching element`` or interconnection strategy of the switching elements`` is the best has been made yet. Therefore, much research needs to be done on analyzing the performance depending on the particular architecture of switching element. Also, to choose an ATM switch fabric, one must concentrate on the development of a practical switching fabric satisfying a large throughput requirement. In this regard one must consider the following two issues : the implementation of high-speed switching elements with parallel configuration, and the realization of a large scale switching network that can expand the system in a simple manner and provides high degree of modularity. First, we develop an analytical model of a nonblocking packet switch with input and output queues to analyze the head-of-line blocking and the output contention problems special to ATM, where a speed-up factor L plays a key role to determine the queueing behavior. It is modeled as a finite input and output queueing system with $1 < L\,N$, where the switch size N is finite. We investigate the effect of parameters L, N, traffic load P and input/output buffer size on the packet loss performance. We solve the model by using the matrix method that is better suited for numerical computation to handle several parameters in a realistic range. With numerical results of this study, we show that the input and output queueing switch having a minimal value of L (e.g., L = 2) can easily be realized, keeping the packet loss performance to an acceptable level. Next, we consider a parallel switch a...