A latch-free self-aligned power MOSFET and IGBT structure with a very small $n^+$source region formed by outdiffusion of phosphorus from the sidewall phosphosilicate glass (PSG) is proposed and successfully fabricated and the latch-up immunity of the IGBT with the proposed structure is also numerically investigated. In the proposed structure, the source or cathode is composed of a silicide contact which shunts the outdiffused $n^+$-source and p-body region.
The fabricated power MOSFET with the mask set for a conventional device shows latch-back-free I-V characteristics and the same current capability as conventional devices for the same geometry. The negligible contact resistance of $n^+$-source-tosilicide is certified theoretically and experimentally. The experimental results clearly show the validity of the new self-aligned power MOSFET with latch-back-free operation and minimized on-resistance.
The proposed IGBT which has the same fabrication sequence as the power MOSFET with the proposed structure also shows good I-V characteristics without latch-up phenomena and has an extremely low on-resistance which is less than the power MOSFET even with the moderately doped p-substrate. The on-resistance of IGBT is drastically reduced by a factor of 10 because of the conductivity modulation due to the high level injection of minority carrier.
Finally, the latch-up phenomena in latch-up-free self-aligned IGBT are successfully investigated using a two-dimensional device simulator (PISCES) for various lengths of the $n^+$-region. The numerical scheme which treats the IGBT structure consisting of $n^+$-p-$n^-$-$p^+$ layer as an $n^+$-i-$p^+$ diode in conduction state shows fast convergence for the calculation of the holding voltage and the holding current. The simulated results also show that sufficient latch-up immunity is obtained when the length of the $n^+$-region is less than 1μm. In order to suppress the latch-up in IGBT, the reduction of the length of the $n^+$-reg...