(A) study on pixelwise readout integrated circuit for uncooled infrared focal plane arrays

Abstract

In this study, pixelwise readout integrated circuit for uncooled infrared focal plane arrays was discussed. To reduce the noise of bolometers, two types of readout circuits have been suggested as follows: the current mirror gate modulation input circuit for bolometers and new pixelwise readout circuit which integrates the signal current pixelwisely and performs pixel level analog-to-digital conversion. Proposed input circuit is suitable to the pixelwise readout architecture due to its simple structure and low power consumption and a proposed pixel level A/D converter can reduce the noise and the power consumption. Using these methods, we can obtain the high performance IR images. Summaries of this work are as follows. Noise performance is one of the most important factors in the design of readout circuits. The magnitude of the noise voltage depends on the noise bandwidth. An integrator is employed which limits the noise bandwidth to the frequency interval from 0 Hz to the reciprocal of the integration time, which is chosen to be equal to the pulse duration when using pulsed bias. The total noise decreases as the integration time increases. A high-performance pixelwise readout integrated circuit for a microbolometer was investigated. Responsivity was increased 1.5 times through the use of a current mirror gate modulation, and noise of the microbolometer was decreased through an increase in the integration time with a pixelwise readout architecture. Consequently, using an identical infrared detector, performance will be improved about 3 times by adopting the proposed readout circuit over a conventional readout circuit. Using on-chip A/D converter, the information can be transported as a more power efficient way in the digital domain, and on-chip signal processing for system-on-chip (SoC) can be available. Thus, the system design can be simplified and the cables and IC chip counts can be reduced. Pixel level ADC has many advantages over chip and column level ...