DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, In-Cheol | - |
dc.contributor.advisor | 박인철 | - |
dc.contributor.author | Lee, Hyun-Yong | - |
dc.contributor.author | 이현용 | - |
dc.date.accessioned | 2011-12-14 | - |
dc.date.available | 2011-12-14 | - |
dc.date.issued | 2008 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=295416&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/35456 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2008.2, [ viii, 100 p. ] | - |
dc.description.abstract | Orthogonal frequency division multiplexing (OFDM) has many advantages such as spectral efficiency and robustness against dispersive fading channels, but its hardware implementation still takes much area. In this thesis, an area-efficient OFDM receiver for digital video broadcasting - terrestrial (DVB-T) systems is designed. It has three major components: fast Fourier transform (FFT) processing, synchronization and channel estimation. For FFT processing, a new decomposition algorithm is presented to reduce the size of twiddle factor tables required in pipelined FFT processing. The proposed algorithm called balanced decomposition is to recursively decompose a discrete Fourier transform (DFT) into sub-DFTs such that the transform lengths of the resulting sub-DFTs are almost equal. From the viewpoint of the binary tree representation, the proposed algorithm results in a balanced binary tree. In addition to the table size, the balanced decomposition is also effective in reducing hardware resources such as general multipliers and constant multipliers. For synchronization, 2-step offset estimators are designed for symbol timing, carrier frequency, sampling frequency and frame boundary impairments. By sharing the common processing elements and input/output buffers of the FFT processor, the hardware cost of synchronization units can be reduced. For channel estimation, the least squares algorithm and separable interpolation scheme are adopted. Based on the designed components, an OFDM receiver for DVB-T systems is implemented using a 0.18-\mum CMOS standard cell library. As a result, compared to the previous work, the proposed receiver reduces the area and power consumption by 22% and 29%, respectively. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | OFDM | - |
dc.subject | DVB-T | - |
dc.subject | FFT | - |
dc.subject | 직교 주파수 분할 다중화 방식 | - |
dc.subject | 유럽 디지털 방송 | - |
dc.subject | 고속 푸리에 변환 | - |
dc.subject | OFDM | - |
dc.subject | DVB-T | - |
dc.subject | FFT | - |
dc.subject | 직교 주파수 분할 다중화 방식 | - |
dc.subject | 유럽 디지털 방송 | - |
dc.subject | 고속 푸리에 변환 | - |
dc.title | Area-efficient design of OFDM baseband receiver for DVB-T systems | - |
dc.title.alternative | DVB-T용 저면적 OFDM 기저대역 수신기 설계 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 295416/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 020035250 | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.localauthor | 박인철 | - |
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