DSpace at KOASAS
College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Theses_Ph.D.(박사논문)

Speculative loop pipelining in automatic binary translation for hardware acceleration하드웨어 가속을 위한 자동 이진 변환에서의 추론적 루프 파이프라이닝

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 525
  • Download : 0
Export
DC FieldValueLanguage
dc.contributor.advisorKim, Tag-Gon-
dc.contributor.advisor김탁곤-
dc.contributor.authorOh, Se-jong-
dc.contributor.author오세종-
dc.date.accessioned2011-12-14-
dc.date.available2011-12-14-
dc.date.issued2008-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=295405&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/35445-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2008.2, [ vii, 89 p. ]-
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectBinary translation-
dc.subjectloop pipelining-
dc.subjectmemory optimization-
dc.subjecthardware acceleration-
dc.subjectrecon??gurable computing-
dc.subject이진변환-
dc.subject루프 파이프라이닝-
dc.subject메모리 최적화-
dc.subject하드웨어 가속-
dc.subject재구성 컴퓨팅-
dc.subjectBinary translation-
dc.subjectloop pipelining-
dc.subjectmemory optimization-
dc.subjecthardware acceleration-
dc.subjectrecon??gurable computing-
dc.subject이진변환-
dc.subject루프 파이프라이닝-
dc.subject메모리 최적화-
dc.subject하드웨어 가속-
dc.subject재구성 컴퓨팅-
dc.titleSpeculative loop pipelining in automatic binary translation for hardware acceleration-
dc.title.alternative하드웨어 가속을 위한 자동 이진 변환에서의 추론적 루프 파이프라이닝-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN295405/325007 -
dc.description.department한국과학기술원 : 전기및전자공학전공, -
dc.identifier.uid020025181-
dc.contributor.localauthorKim, Tag-Gon-
dc.contributor.localauthor김탁곤-
Appears in Collection
EE-Theses_Ph.D.(박사논문)
Files in This Item
There are no files associated with this item.

Display Simple Item Record

qr_code

  • mendeley

    citeulike

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.


rss_1.0 rss_2.0 atom_1.0