Reducing constant loads for ARM executable filesARM 실행파일의 상수 로드 경감을 위한 연구

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dc.contributor.advisorHan, Hwan-Soo-
dc.contributor.advisor한환수-
dc.contributor.authorNa, Hyun-Ik-
dc.contributor.author나현익-
dc.date.accessioned2011-12-13T06:06:30Z-
dc.date.available2011-12-13T06:06:30Z-
dc.date.issued2007-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=265039&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/34758-
dc.description학위논문(석사) - 한국과학기술원 : 전산학전공, 2007.2, [ v, 30 p. ]-
dc.description.abstractFor several benefits, unignorable amount of read-only data has been embedded in the text sections of an executable file though there are separate data sections in the file. This, however, becomes serious hindrance when we come to the issues of directly manipulating an executable file for analyzing, profiling or optimizing it. It also incurs some overhead in code size and performance. With all this drawbacks, in a fixed-length instruction set architecture, it goes beyond our choice to embed data into text sections due to the limitation on the bitfield size of the immediate operands in instructions. More specifically, whenever we access data segment we must load the address of the target data in advance from near the current instruction. This makes embedding the address values into the text sections inevitable in such architecture. In this thesis we show that a minor addition in a fixed-length instruction set architecture can cover most of the cases of necessity for the big constants like data addresses without embedding them into the text sections. In addition, it results in code size reduction and improvement in performance. The discussion and experiments are targeted to the ARM instruction set architecture which is an instance of fixed length instruction set architecture and the most widespread one in embedded computing area. The experiments are done with self-constructed binary engineering tool which does necessary analyzing, profiling and rewriting of the ARM executable files and the Simplescalar-ARM simulator.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectDisassembling-
dc.subjectconstant load-
dc.subjectbinary rewriting-
dc.subject실행파일 재작성-
dc.subject디스어셈블링-
dc.subject상수 로드-
dc.titleReducing constant loads for ARM executable files-
dc.title.alternativeARM 실행파일의 상수 로드 경감을 위한 연구-
dc.typeThesis(Master)-
dc.identifier.CNRN265039/325007 -
dc.description.department한국과학기술원 : 전산학전공, -
dc.identifier.uid020053186-
dc.contributor.localauthorHan, Hwan-Soo-
dc.contributor.localauthor한환수-
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CS-Theses_Master(석사논문)
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