State-checking push-pull interface generation for rapid prototyping

Abstract

hardware/software codesign for embedded systems consists of following steps : high level specification, high level specification language translation, cosimulation, formal verification, design partitioning, software synthesis, hardware synthesis, and rapid prototyping. The rapid prototyping plays a crucial role in the overall codesign flows. Using rapid prototyping, we can validate the specification and provide developers with feedback during the design process. It is mixture of the software synthesis and the hardware synthesis. There exist physical and logical gaps between hardware and software. We need a communication mechanism which delivers data between hardware and software. This mechanism is called as interface which consists of the device driver and the hardware controller. In the earlier design frameworks, the interface generation is manually done by the hard-ware designers. It is tedious and error-prone because the hardware designers have to know both characteristics of the hardware and software. We design an interface generator from high level specification by modeling the target architecture. In this paper, we present Push-Pull Interface. This is a realistic communication model which can express interrupt, polling, and sensing mechanisms in our codesign framework. We call the transfered data between hardware and software as communication events. Our Push-Pull Interface delivers communication events between two extended finite states machines(EFSMs) in the logical layer, and provides library functions which connect C and Esterel(or Verilog HDL) in the specification layer. From these two layers, our Hardware INterface GEneartor(HINGE) system generates a device driver(in C), a driver API(in C) for Linux and a controller logic(in Verilog HDL) for ALTERA Cyclone FPGA chip. Our contribution in this paper is the automatic interface generation from the high level specification. In addition, we provide the run-time state-checking interface validating the high...