(A) system for generating VLSI mask pattern check plots from CIF file

Abstract

A system for generating VLSI mask pattern check plots from CIF(Caltech Intermediate Form) file is proposed in this thesis. This system have a translator that translate the CIF file for VLSI layout description into a resultant FORTRAN drawing program. Also, without converting the CIF file into a resultant FORTRAN drawing program this system can draw VLSI mask pattern check plots from the CIF file directly. And this system provides a pattern generation file for pattern generation and a mask artwork data file. A grammar of the CIF is analyzed, and the modified grammar is proposed for this system. This system has a number of interactive command line options. These command line options allow us to determine which device we want to plot on, the layers we want plotted, the window size for our plot, whether to shade, and such plot control parameters as output device types, layer names, window sizes.