DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Cho, Jung-Wan | - |
dc.contributor.advisor | 조정완 | - |
dc.contributor.author | Lee, Sang-Gu | - |
dc.contributor.author | 이상구 | - |
dc.date.accessioned | 2011-12-13T05:47:55Z | - |
dc.date.available | 2011-12-13T05:47:55Z | - |
dc.date.issued | 1981 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=63017&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/33521 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전산학과, 1981.2, [ [ii], 31, [1] p. ] | - |
dc.description.abstract | The fast Fourier transform (FFT) is an efficient algorithm to compute the discrete Fourier coefficients of a finite sequence of data. In this thesis, a FFT processor is proposed. The proposed processor includes novel design concepts such as the overlapping of arithmetic and memory operations, a simultaneous write-read memory, and pipelined parallel computation of 2 stages of the perfect shuffle network. Control of the processor is implemented by microprogramming technique. It performs a 8-point FFT in 7 $\mu$S at 2-MHz clock rate, and can operate up to a 15-MHz clock. Microprogram control of the system organization provides a flexible processing capability and the pipeline feature provides the maximum utilization of the hardware resources. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | 고속 fourier 변환. | - |
dc.title | (A) study on pipelined, parallel FFT processor | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 63017/325007 | - |
dc.description.department | 한국과학기술원 : 전산학과, | - |
dc.identifier.uid | 000791187 | - |
dc.contributor.localauthor | Cho, Jung-Wan | - |
dc.contributor.localauthor | 조정완 | - |
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