(A) study on the image processor memory architecture

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Image processing operations require that an image or partial image be stored in a memory system that permits access to sequences of image points along any row or column of this image array and/or to the image points within small rectangular areas of the array. In this paper an economic addressing circuitry of such memory system is developed, which separates address calculation and routing. The proposed relative address calculation method improves both cost and complexity of the memory system which can be accessed pq x 1, 1 x pq and/or p x q image subarray simultaneously, where p and q are design parameters.
Advisors
Lee, Bum-Chun이범천
Description
한국과학기술원 : 전산학과,
Publisher
한국과학기술원
Issue Date
1981
Identifier
63006/325007 / 000791102
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전산학과, 1981.2, [ iii, 52, [9] p. ]

Keywords

저장 시스템.

URI
http://hdl.handle.net/10203/33510
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=63006&flag=dissertation
Appears in Collection
CS-Theses_Master(석사논문)
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