Experiment of a bit slice microprocessor

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dc.contributor.advisorPark, Joseph C. H.-
dc.contributor.authorSong, Sang-Hoon-
dc.contributor.author송상훈-
dc.date.accessioned2011-12-13T05:47:14Z-
dc.date.available2011-12-13T05:47:14Z-
dc.date.issued1979-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=62446&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/33474-
dc.description학위논문 (석사) - 한국과학기술원 : 전산학과, 1979.2, [ [2], 46 p. ]-
dc.description.abstractThis is a subpart of a continuing research dealing with a design and construction of a general purpose mini-level digital computer system. In our system, the CPU module emulating the PACE which has 16 bit word length was designed using 3000 series bit slice microprogrammable microprocessors. In this thesis, the CPU module is implemented using the various supporting tool such as ICE-30 and ROM-SIMULATOR. The ICE-30 emulate the chip which performs major function in the microprocessor family, MCU, whose function include maintaing and generating microprogram address and control memory which contains the microprogram. They allow the use of RAMs for real time debugging of microprograms during development and debugging. With this control memory, the prototype is fully tested and operated in the single step mode and real time mode under the control of ICE-30 software and hardware.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.titleExperiment of a bit slice microprocessor-
dc.typeThesis(Master)-
dc.identifier.CNRN62446/325007-
dc.description.department한국과학기술원 : 전산학과, -
dc.identifier.uid000771060-
dc.contributor.localauthorPark, Joseph C. H.-
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CS-Theses_Master(석사논문)
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