Since the discovery of ferroelectricity in hafnia, hafnia-based ferroelectrics have been utilized in a variety of applications. In particular, ferroelectric field-effect transistors have been attracting attention as a new generation of non-volatile memory devices due to their non-volatility, multi-level characteristics, high-speed operation, low-voltage operation, and compatibility with CMOS process. However, due to the operating principle of the device, charge is trapped at the interface of ferroelectric and silicon, resulting in large losses in memory window, endurance, and retention. In addition, the silicon oxide layer generated at the interface of hafnia and silicon during the process has a low dielectric constant, which causes side effects such as an increase in the amount of charge trapping, an increase in the operating voltage, and a depolarizing electric field. Therefore, to prevent this, research on interlayers between ferroelectric layers and silicon is being actively conducted. Among various interlayer materials, La2O3 is a good candidate due to its high dielectric constant, good contact stability with silicon, and thermal stability. In this paper, the performance and reliability improvement effects of inserting a La2O3 interlayer at the interface of ferroelectric layer and silicon are investigated for the first time. First, the effect of controlling the number of atomic layer depositions of La2O3 at the interface of ferroelectric layer and silicon in the form of a capacitor was verified by material and electrical measurements. In addition, ferroelectric field effect transistor with electron channel was fabricated to electrically evaluate the effect of inserting La2O3 interlayer. As a result, improvements in characteristics such as memory window, operating current, endurance, and retention were observed. In conclusion, it is verified that La2O3 is suitable as an interlayer for electronic channel ferroelectric field effect transistors.