DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 권영진 | - |
dc.contributor.author | Lee, Chang Jun | - |
dc.contributor.author | 이창준 | - |
dc.date.accessioned | 2024-07-25T19:31:25Z | - |
dc.date.available | 2024-07-25T19:31:25Z | - |
dc.date.issued | 2023 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1045961&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/320729 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전산학부, 2023.8,[iii, 27 p. :] | - |
dc.description.abstract | CXL(Compute Express Link) is a next generation memory interconnect technology that supports lower latency, higher bandwidth. Recently, there has been increasing attention and active development in the fields of artificial intelligence and big data processing. The demand for programs that utilize large memory capacity has also been on the rise. Type 3 devices of CXL can be used as memory expander and provide larger memory capacity. In this study, we emulated a structure where the memory expander is directly connected to the processor without switch by using a non-uniform memory access machine. We consider a hierarchical memory structure that includes local memory within the same node and remote memory from different nodes. In this hierarchical memory structure, we investigate efficient memory management techniques that can be applied to Type 3 CXL memory expander. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | CXL▼a불균일 메모리 접근 (NUMA)▼a계층 메모리 구조 | - |
dc.subject | Compute Express Link (CXL)▼aNon-Uniform Memory Access (NUMA)▼atiered memory | - |
dc.title | CXL based tiered memory management system | - |
dc.title.alternative | CXL 기반 계층 메모리 관리 시스템 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전산학부, | - |
dc.contributor.alternativeauthor | Kwon, Young Jin | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.