Demonstration of NAND flash erase characteristics using oxide semiconductor channel

Abstract

Three-dimensional flash memory (V-NAND) has significantly increased memory capacity, breaking away from the constraints of existing 2D structures. However, the number of memory layers increases and scaling is performed, there is a problem that the current flowing through one string decreases. To solve this problem, research on introducing new channel materials with high mobility is continuously underway, and oxide semiconductors have been proposed as a representative material. The oxide semiconductors can have high mobility in amorphous phase containing spatially spread metal ns orbitals with isotropic shape, so it is expected to solve not only the problem of current reduction but also the problem of distribution of threshold voltage. By manufacturing IGZO channel devices, mobility increased by 130%. However, there is a fatal disadvantage that erase operation is impossible due to a lack of holes. The IGZO channel is characterized by a fermi level pinning phenomenon caused by a density of state (DOS) on the VBM, thereby not forming an inversion layer. It is verified through simulation that, when negative bias is applied, voltage is not applied to the channel and the channel becomes floating. To solve this problem, a gate injection double layer structure was presented. Erase operation was verified when the gate injection scheme was applied by implementing the MIS cap form. The memory characteristics of the gate injection structure and the influence of the capacity formed by the IGZO channel were analyzed. In addition, the applicability of the double layer was confirmed using the simulation tool. Through this, this paper presents the promise of IGZO channels in improving mobility in 3D flash memory.