DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 김주영 | - |
dc.contributor.author | Kim, Jaeuk | - |
dc.contributor.author | 김재욱 | - |
dc.date.accessioned | 2024-07-25T19:31:13Z | - |
dc.date.available | 2024-07-25T19:31:13Z | - |
dc.date.issued | 2023 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1045902&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/320672 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2023.8,[iv, 23 p. :] | - |
dc.description.abstract | Sparse General Matrix-Matrix Multiplication (SpGEMM) is a key computational kernel in various emerging applications, such as linear algebra, computational chemistry, graph analytics, and deep learning. These applications are memory-bounded that real-world matrix from graph matrix or AI show up to 0.0001% density. Prior row-wise based state-of-the-art accelerator introduces highly-banked cache to maximize output reuse. However, inefficiently utilize the cache that processes multiple rows concurrently with high-radix and low-throughput mergers, which limits output reuse. To address this problem, this paper proposes a bitonic-sorter-based high-radix and high-throughput merger that maximizes output reuse. We minimize the overhead of high-throughput mergers by removing redundant comparison of bitonic-sorter with a novel one-cycle prediction scheme to optimize it. We further develop a fullypipelined accumulator and aligner to mitigate the long latency penalty. We implement a cycle-accurate simulator based on gem5, which shows 2x, 6x, 47x speedup over prior state-of-the-art Matraptor, GPU, and CPU, respectively. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | 희소 행렬 곱셈▼a가속기▼a정렬▼a메모리 구조▼a데이터 흐름 | - |
dc.subject | SpGEMM▼aAccelerator▼aSorting▼aMemory hierarchy▼aDataflow | - |
dc.title | High-throughput merger based general sparse matrix-matrix multiplication accelerator | - |
dc.title.alternative | 높은 처리량을 가지는 정렬기 기반의 희소행렬곱 가속기 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학부, | - |
dc.contributor.alternativeauthor | Kim, Jooyoung | - |
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