DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, SeongHwan | ko |
dc.contributor.author | Lee, Hyuk-Jin | ko |
dc.contributor.author | Kim, Kyung Hyun | ko |
dc.contributor.author | Seo, Jin O | ko |
dc.date.accessioned | 2024-05-24T07:01:03Z | - |
dc.date.available | 2024-05-24T07:01:03Z | - |
dc.identifier.uri | http://hdl.handle.net/10203/319498 | - |
dc.description.abstract | A MAC operating device comprising a plurality of operation circuits respectively including an operation capacitor and a plurality of switches; and a division capacitor, wherein one end of the operation capacitor is respectively connected to a first operation switch connected to an input terminal and a first reset switch connected to a ground terminal, and the other end of the operation capacitor is connected to both a second operation switch connected to a division capacitor and a second reset switch connected to the ground terminal is provided. | - |
dc.title | MAC operating device and method for processing machine learning algorithm | - |
dc.title.alternative | 기계학습 알고리즘을 처리하는 MAC 연산 장치 및 방법 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Cho, SeongHwan | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 17178592 | - |
dc.identifier.patentRegistrationNumber | 11803354 | - |
dc.date.application | 2021-02-18 | - |
dc.date.registration | 2023-10-31 | - |
dc.publisher.country | US | - |
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