Dynamic random access memory device with long retention and operating method thereof장시간 전하 저장 DRAM 소자와 그 동작 방법

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dc.contributor.authorChoi, Yang-Kyuko
dc.contributor.authorKim, Myungsuko
dc.date.accessioned2024-04-18T08:00:17Z-
dc.date.available2024-04-18T08:00:17Z-
dc.identifier.urihttp://hdl.handle.net/10203/319104-
dc.description.abstractDisclosed are a DRAM device capable of storing charges for a long time and an operating method thereof. According to an embodiment, a DRAM device includes a channel region formed on a substrate, a gate insulating film region formed on the channel region, a floating gate region formed on the gate insulating film region, a transition layer region formed on the floating gate region, and a control gate region formed on the transition layer region and generating a potential difference with the floating gate region in response to a fact that a potential that is not less than a reference potential is applied and releasing at least one charge stored in the floating gate region or storing the at least one charge into the floating gate region, by generating a transition current due to the potential difference.-
dc.titleDynamic random access memory device with long retention and operating method thereof-
dc.title.alternative장시간 전하 저장 DRAM 소자와 그 동작 방법-
dc.typePatent-
dc.type.rimsPAT-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.assigneeKAIST-
dc.identifier.iprsType특허-
dc.identifier.patentApplicationNumber17674301-
dc.identifier.patentRegistrationNumber11922988-
dc.date.application2022-02-17-
dc.date.registration2024-03-05-
dc.publisher.countryUS-
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EE-Patent(특허)
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