A Sub-aF Super-High-Resolution Capacitance-to-Digital Converter with a Bandpass ΔΣ ADC

Abstract

A super-high-resolution capacitance-to-digital converter (CDC) capable of reaching sub-aF capacitance resolution has been proposed. The CDC employs a continuous-time (CT) low-noise capacitance-to-voltage converter (CVC) followed by a high linearity bandpass ΔΣ ADC (BP-ΔΣM) without frequency demodulation. By avoiding demodulation and utilizing a narrow-band sensing technique, the proposed CDC achieves a sub-aF capacitance resolution while expanding the input capacitance range through a coarse C-DAC calibration loop. The proposed circuit has been implemented in a 0.35-μm CMOS process with a 3.3 V power supply voltage. The CDC shows a capacitance resolution of 0.98 aFrms, with a capacitance range of 3.1 pF, while consuming 4.16 mW.