Monolithically 3-D Integrated Nanoelectromechanical (NEM) Configuration Memory for CMOS-NEM Hybrid Demultiplexer

Abstract

Compared to conventional CMOS-only circuits, CMOS-nanoelectromechanical (CMOS-NEM) hybrid circuits provide significant advantages such as improved energy efficiency, owing to the near-zero leakage current of NEM memory, and increased chip density through their vertical stacking ability. In recent hybrid circuits, the conventional role of NEM memory has been to facilitate switching within the signal path. Yet, the high resistance of the NEM memory induces signal degradation and delay issues when situated within the signal path. In this letter, we propose an alternative approach by utilizing the NEM memory as a configuration memory outside the signal path, effectively avoiding the potential disadvantages associated with its high resistance characteristics. The proposed circuit is demonstrated as a 1-to-4 demultiplexer, storing select line data. This demonstration introduces new possibilities for future enhancements in the designing of CMOS-NEM hybrid circuits.