Monolithically 3-D Integrated Nanoelectromechanical (NEM) Configuration Memory for CMOS-NEM Hybrid Demultiplexer

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Compared to conventional CMOS-only circuits, CMOS-nanoelectromechanical (CMOS-NEM) hybrid circuits provide significant advantages such as improved energy efficiency, owing to the near-zero leakage current of NEM memory, and increased chip density through their vertical stacking ability. In recent hybrid circuits, the conventional role of NEM memory has been to facilitate switching within the signal path. Yet, the high resistance of the NEM memory induces signal degradation and delay issues when situated within the signal path. In this letter, we propose an alternative approach by utilizing the NEM memory as a configuration memory outside the signal path, effectively avoiding the potential disadvantages associated with its high resistance characteristics. The proposed circuit is demonstrated as a 1-to-4 demultiplexer, storing select line data. This demonstration introduces new possibilities for future enhancements in the designing of CMOS-NEM hybrid circuits.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2023-12
Language
English
Article Type
Article
Citation

IEEE ELECTRON DEVICE LETTERS, v.44, no.12, pp.2055 - 2058

ISSN
0741-3106
DOI
10.1109/LED.2023.3322399
URI
http://hdl.handle.net/10203/315434
Appears in Collection
EE-Journal Papers(저널논문)
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