SuM: Efficient shadow stack protection on ARM Cortex-M

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dc.contributor.authorChoi, Wonwooko
dc.contributor.authorSeo, Minjaeko
dc.contributor.authorLee, Seongmanko
dc.contributor.authorKang, Brent Byunghoonko
dc.date.accessioned2023-11-16T06:00:13Z-
dc.date.available2023-11-16T06:00:13Z-
dc.date.created2023-11-16-
dc.date.created2023-11-16-
dc.date.created2023-11-16-
dc.date.issued2024-01-
dc.identifier.citationCOMPUTERS & SECURITY, v.136-
dc.identifier.issn0167-4048-
dc.identifier.urihttp://hdl.handle.net/10203/314778-
dc.description.abstractSystem software written in unsafe languages such as C/C++ is susceptible to various types of security vulnerabilities. Historically, backward-edges such as return addresses have been an attractive target for control-flow hijacking attacks due to the severity and ease of exploitation. Although various backward-edge control-flow integrity schemes have been proposed over the years, most of them mainly focus on protecting desktop/server-class systems, leaving embedded systems unprotected. Even worse, bringing their defense mechanisms into resource-constrained embedded systems is undesirable because they were originally designed for high-end computing systems and thus are not directly applicable to embedded systems without compromising performance and real-time constraints. In this paper, we propose Shadow under the Mask (SUM), an efficient and robust backward-edge control flow protection that is applicable to ARM Cortex-M processors. Specifically, SUM realizes a non-bypassable shadow stack mechanism and safeguards its structural integrity in a novel combination of an MPU and FaultMask—an overlooked hardware feature in Cortex-M processors. To be more specific, SUM restricts all access to the shadow stack through MPU, ensuring its integrity; and temporarily disables its MPU protection through FaultMask during the execution of safe instructions, guaranteeing that only authorized instructions can modify the shadow stack. In our empirical evaluation, SUM incurs minimal runtime overhead of 2.77% and 2.63%, respectively, on the BEEBS and CoreMark benchmark suites. These results underscore the viability of our proposed approach as a practical and potent solution to address the highlighted cybersecurity challenge.-
dc.languageEnglish-
dc.publisherELSEVIER ADVANCED TECHNOLOGY-
dc.titleSuM: Efficient shadow stack protection on ARM Cortex-M-
dc.typeArticle-
dc.identifier.wosid001111396900001-
dc.identifier.scopusid2-s2.0-85175867911-
dc.type.rimsART-
dc.citation.volume136-
dc.citation.publicationnameCOMPUTERS & SECURITY-
dc.identifier.doi10.1016/j.cose.2023.103568-
dc.contributor.localauthorKang, Brent Byunghoon-
dc.contributor.nonIdAuthorChoi, Wonwoo-
dc.contributor.nonIdAuthorSeo, Minjae-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorARM-
dc.subject.keywordAuthorSoftware vulnerability-
dc.subject.keywordAuthorExploit mitigation-
dc.subject.keywordAuthorShadow stack-
dc.subject.keywordAuthorControl-flow integrity-
dc.subject.keywordAuthorCompiler-
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