Electrical characterization of bump-less high speed channel on silicon, organic and glass interposer

Abstract

In this paper, we propose the structure of bump-less high speed channel on interposer in through-via based 2.5D or 3D integrated circuit (IC). Electrical characterization of the proposed structure is analyzed by simulation in the frequency-and time-domain. In order to discuss and analyze the electrical characteristics of the proposed structure in detail, the bump-less channel and the channel with the bump are compared. In addition, the electrical characteristics on interposer are greatly affected by the material properties of the substrate. Therefore, we compared and analyzed the bump-less high speed channel performance on silicon, organic and glass interposer. For obtaining reasonable results, all parameters such as the dimensions of the proposed structure and material properties are decided based on recent or near-future fabrication process. With the simulation results, it is observed that bump-less high speed channel on organic and glass interposer shows better electrical performance compared to silicon interposer.