Power distribution network design and optimization based on frequency dependent target impedance

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dc.contributor.authorKim, Youngwooko
dc.contributor.authorKim, Kiyeongko
dc.contributor.authorCho, Jong-Hyunko
dc.contributor.authorKim, Jounghoko
dc.contributor.authorKang, Kibumko
dc.contributor.authorYang, Taisikko
dc.contributor.authorRa, Yunko
dc.contributor.authorPaik, Woohyunko
dc.date.accessioned2023-10-06T07:00:38Z-
dc.date.available2023-10-06T07:00:38Z-
dc.date.created2023-10-06-
dc.date.issued2015-12-
dc.identifier.citationIEEE Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2015, pp.89 - 92-
dc.identifier.urihttp://hdl.handle.net/10203/313079-
dc.description.abstractIn this paper, frequency dependent target impedance is proposed for optimal Power Distribution Network (PDN) design. Target impedance indicates how much and where decoupling capacitors should be located in the PDNs therefore it directly affects performance of the electrical systems or manufacturing cost. In this paper, frequency dependent target impedance considering IC's power current spectrum is proposed. Based on the proposed target impedance, GPU's VDD PDN is designed so that the hierarchical PDN impedance is maintained bellow the proposed target impedance in frequency domain. We simulated designed PDN with GPU chip's signal model in the time domain to verify the proposed target impedance. Simultaneous Switching Noise (SSN) in the GPU chip PDN was suppressed bellow the target which is 5% of the supply voltage based on proposed design. Compared to the conventional target impedance, proposed target impedance allowed more flexible design and at the same time satisfied the design criterion.-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titlePower distribution network design and optimization based on frequency dependent target impedance-
dc.typeConference-
dc.identifier.scopusid2-s2.0-84963864328-
dc.type.rimsCONF-
dc.citation.beginningpage89-
dc.citation.endingpage92-
dc.citation.publicationnameIEEE Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2015-
dc.identifier.conferencecountryKO-
dc.identifier.conferencelocationSeoul-
dc.identifier.doi10.1109/EDAPS.2015.7383675-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorKang, Kibum-
dc.contributor.nonIdAuthorYang, Taisik-
dc.contributor.nonIdAuthorRa, Yun-
dc.contributor.nonIdAuthorPaik, Woohyun-
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EE-Conference Papers(학술회의논문)
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