The electrical characteristics of silicon and glass interposer channel are heavily affected by the design of through silicon via (TSV) and through glass via (TGV). In this paper, we analyzed the overall signal integrity of glass and silicon interposer channel including through package via. To compare electrical property between silicon and glass, we simulated these channels in frequency-domain and time-domain. We observed s-parameter of single and multiple via transition channel. Moreover we compared the characteristic impedance and eye diagram simulation results. Finally, we observed the change of electrical characteristics when the impedance mismatch is occurred at via pad.