Design Guidelines of Thermally Stable Hafnia Ferroelectrics for the Fabrication of 3D Memory Devices

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dc.contributor.authorKim, Giukko
dc.contributor.authorShin, Hunbeomko
dc.contributor.authorEom, Taehyongko
dc.contributor.authorJung, Minhyunko
dc.contributor.authorKim, Taehoko
dc.contributor.authorLee, Sanghoko
dc.contributor.authorKim, Minkiko
dc.contributor.authorJeong, Yeongseokko
dc.contributor.authorKim, Ji-Sungko
dc.contributor.authorNam, Kab-Jinko
dc.contributor.authorKuh, Bong Jinko
dc.contributor.authorJeon, Sanghunko
dc.date.accessioned2023-08-31T10:00:22Z-
dc.date.available2023-08-31T10:00:22Z-
dc.date.created2023-02-24-
dc.date.issued2022-12-
dc.identifier.citation2022 International Electron Devices Meeting, IEDM 2022, pp.541 - 544-
dc.identifier.issn2380-9248-
dc.identifier.urihttp://hdl.handle.net/10203/312078-
dc.description.abstractWe provide a methodology for designing thermally stable hafnia ferroelectric (FE) materials to be taken into account while fabricating 3D memory devices. We reveal the underlying origins for the thermal instability of hafnia FE materials in terms of kinetics and material science. Furthermore, we suggest adopting dopants whose ionic radius is smaller than Hf in the FE matrix as a feasible option to demonstrate a thermally stable hafnia FE material. Using this approach, robust ferroelectricity is achieved even at a subsequent thermal budget (TB) of 750 °C for 30 min. The improved thermal stability stems from the reduced formation of both the m-phase and oxygen vacancy (VO) in hafnia FE materials at high TB. The in-depth electrical and material analysis in this study serves a framework for further research into the thermal stability of FE. This work contributes to the commercialization of FE devices by filling the gap between the functionality of FE materials and their process applicability for 3D devices.-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleDesign Guidelines of Thermally Stable Hafnia Ferroelectrics for the Fabrication of 3D Memory Devices-
dc.typeConference-
dc.identifier.wosid000968800700114-
dc.identifier.scopusid2-s2.0-85147494479-
dc.type.rimsCONF-
dc.citation.beginningpage541-
dc.citation.endingpage544-
dc.citation.publicationname2022 International Electron Devices Meeting, IEDM 2022-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationSan Francisco, CA-
dc.identifier.doi10.1109/IEDM45625.2022.10019458-
dc.contributor.localauthorJeon, Sanghun-
dc.contributor.nonIdAuthorKim, Giuk-
dc.contributor.nonIdAuthorShin, Hunbeom-
dc.contributor.nonIdAuthorEom, Taehyong-
dc.contributor.nonIdAuthorJung, Minhyun-
dc.contributor.nonIdAuthorKim, Taeho-
dc.contributor.nonIdAuthorLee, Sangho-
dc.contributor.nonIdAuthorKim, Minki-
dc.contributor.nonIdAuthorJeong, Yeongseok-
dc.contributor.nonIdAuthorKim, Ji-Sung-
dc.contributor.nonIdAuthorNam, Kab-Jin-
dc.contributor.nonIdAuthorKuh, Bong Jin-
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