A Highly Efficient V-Band Dual-Harmonic-Driven Frequency Doubler

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A V-band frequency doubler with a dual-harmonic-driven push-push core with a pair of accumulation-mode MOS (AMOS) varactors at the input is presented. The nonlinear characteristics of the varactor introduce 2f(0) into the input, which is amplified and added to the rectified 2f(0) at the output of the push-push core. This facilitates high DC-to-RF efficiency. AMOS varactors with odd symmetric C-V characteristics are used to efficiently create 2f(0).The doubler is implemented in 28nm bulk CMOS technology, achieving an output power of -2.4 to 0.2 dBm and drain efficiency of 13.6 to 20.2% at frequencies of 50-64 GHz. The core size of the chip is 0.053 mm(2), which is the smallest among reported V- and E-band frequency doublers.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2023-07
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.70, no.7, pp.2350 - 2354

ISSN
1549-7747
DOI
10.1109/TCSII.2023.3240226
URI
http://hdl.handle.net/10203/311738
Appears in Collection
EE-Journal Papers(저널논문)
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