Design and analysis of an active simultaneously switching output noise reduction scheme

Abstract

This paper proposes a scheme to reduce ground and supply bounce that is generated from simultaneously switching output (SSO) buffers. The scheme is implemented by adding buffers those switch output of phase with existing ones. The additional buffers are different from the existing ones that their outputs are terminated on-die with few pF of small capacitors whereas the outputs of the existing ones extend to the channel to receivers. The charging/discharging current from the on-die capacitors lags 180 degrees those from the existing buffers and cancels the fundamental and odd harmonic terms of the existing buffers. Finally, the reduction of overall simultaneously switching current results in the reduction of ground and supply bounce in the system. This paper has successfully verified the proposed scheme by showing that SSO noise is reduced 74 % in maximum with the proposed scheme. Compared to the conventional usage of large on-die decoupling capacitors, the proposed scheme can efficiently reduce SSO noise because the additional buffers occupy smaller area.