Prediction of optimal parameters of semiconductor process by double CVAE modelDouble c-VAE model을 통한 semiconductor process target ouput input parameter 예측

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This paper deals with the prediction of optimal parameters between linked processes by applying a deep learning CVAE model to the current semiconductor development system. In the process of semiconductor development, which requires a lot of time and money for one experiment, we learned the relationship between the target specification and the experimental input value to satisfy the specification with CVAE model to predict the optimal experimental variable input value and result value in advance. Experiments were conducted on predicting the optimal target value for each unit process of the spacer process to generate a uniform pattern and process optimization to satisfy the etching amount according to the process progress time of different materials. Finally, in order to reduce the measurement waiting and measurement time that take a long time in the semiconductor production process, the accuracy was improved by predicting the measurement value with the CVAE model through related parameters without actual measurement. The optimal input value was predicted by applying it to the actual mass production data of DRAM and testing the efficient model configuration according to the dimension of the experimental input value and target specification. A model that predicts experimental results for multiple experimental variables, a model that predicts experimental input variables to satisfy multiple experimental target results, and two CVAEs are configured to improve the target function of the two models at the same time, and an architecture for performance improvement was also experimented.
Advisors
Sung, Youngchulresearcher성영철researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2023
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2023.2,[iii, 26 p. :]

Keywords

Deep learning▼aProcess optimization▼aSemiconductor process▼aSemiconductor fabrication process; 딥 러닝▼a공정 최적화▼a반도체 공정 개발▼a반도체 공정 최적화

URI
http://hdl.handle.net/10203/309932
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1032857&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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