Comprehensive understanding of HZO-Based n/p-channel FEFET operation mechanism and improved device performance by the electron de-trapping mode

Abstract

Ferroelectric field-effect-transistor has been considered a promising nonvolatile memory device due to its CMOS compatibility, scalability, and energy efficiency. However, the device physics has not been studied well, which hinders FEFET development and process design kit construction for the applications. In this paper, we report a comprehensive understanding of the n/pFEFET operation mechanism as a nonvolatile memory device, for the first time, based on quasi-static split C-V (QSCV) measurement. We suggest a new methodology to examine the device and show the existence of excess trapped charge and the true nonvolatile polarization. Furthermore, we found that charge trapping is necessary to switch polarization in FEFET. Finally, based on our physical findings and insight, we propose a new erase mode that leads to a wider memory window and higher write endurance (>10^10 cycles).