Demonstration of vertically stacked transfer-free MoS2 nanosheet transistor직성장 MoS2 적층형 나노시트 트랜지스터 구현 및 개발

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This dissertation focuses on demonstrating and analyzing vertically stacked MoS2 nanosheet transistor, a structural revolution of conventional silicon planer FET, to boost scaling for device integration and overcome the limitation of silicon channel. The first purpose of this work is vertically stacked nanosheet transistor process integration using direct grown MoS2. The second purpose of this work is to analyze the electrical characteristics of vertically stacked MoS2 transistor and compare with planer MoS2 transistor to present the effectiveness of Gate-all-around (GAA) structure An experiment was conducted by directly grown a two-dimensional semiconductor MoS2 using Metal Oxide Chemical Vapor Deposition (MOCVD) that is capable of two-dimensional semiconductor direct growth without transfer porcess. When MoS2 is grown on the gate dielectric (Al2O3), there is a problem that carbon degrades the leakage current characteristics due to the thermal decomposition of the sulfur precursor at a high temperature of 600℃. Carbon on the surface of the gate dielectric was identified through an Atomic Force Microscope and Raman spectroscopy, and the partial pressure of hydrogen was increased during growth to suppress carbon generation in pyrolysis of sulfur precursor and carbon was removed through O2 plasma treatment during channel patterning. Carbon suppression was confirmed through atomic force microscopy and Raman spectroscopy, and improved insulating characteristics were compared and analyzed. The characteristics of the direct growth MoS2 were analyzed by comparing and analyzing the MoS2 nanosheet transistor manufactured by the transfer process through electrical measurement, and the characteristics of the stacked nanosheet transistor and planar MoS2 transistor were compared and analyzed. In conclusion, the stacked two-dimensional semiconductor nanosheet transistor opens new possibilities in the two-dimensional semiconductor field, indicating that it could be an innovative solution to the GAA structure of future two-dimensional semiconductors and multi-channel nanosheet transistors.
Advisors
Cho, Byung Jinresearcher조병진researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2022
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2022.8,[vi, 51 p. :]

Keywords

two-dimensional semiconductor▼aMoS2▼agate leakage▼aNanosheet transistor▼ascaling down▼adirect growth▼atransfer-free▼aGate-all-around structure▼aMOCVD; 이차원 반도체▼a몰리브덴 설파이드▼a누설 특성▼a나노시트 트랜지스터▼a스케일링 다운▼a직성장▼aGAA 구조

URI
http://hdl.handle.net/10203/309435
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1008347&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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