Method of fabricating multilayered UBM for flip chip interconnections by electroplating전기 도금에 의한 플립 칩 상호 접속을 위한 다층 UBM 제조 방법

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dc.contributor.authorKim, Su Hyeonko
dc.contributor.authorKim, Jong Yeonko
dc.contributor.authorYu, Jinko
dc.date.accessioned2022-12-16T07:01:58Z-
dc.date.available2022-12-16T07:01:58Z-
dc.identifier.urihttp://hdl.handle.net/10203/303124-
dc.description.abstractDisclosed is a fabrication method of UBM for flip chip interconnections of a semiconductor device, consisting of dipping a patterned wafer into a plating solution containing materials supplying nickel and copper ions, forming a copper layer at a predetermined current density for connection between a chip pad and a solder bump and for residual stress-buffering, and forming a nickel-copper alloy layer at an increased current density for prevention of diffusion between the solder and the pad. The method is advantageous in terms of low fabrication cost due to not requiring an etching process, while meeting the conditions of wettability, diffusion-barrier function and small residual stress required to form UBM on the patterned wafer.-
dc.titleMethod of fabricating multilayered UBM for flip chip interconnections by electroplating-
dc.title.alternative전기 도금에 의한 플립 칩 상호 접속을 위한 다층 UBM 제조 방법-
dc.typePatent-
dc.type.rimsPAT-
dc.contributor.localauthorYu, Jin-
dc.contributor.nonIdAuthorKim, Jong Yeon-
dc.contributor.assigneeKAIST-
dc.identifier.iprsType특허-
dc.identifier.patentApplicationNumber10232471-
dc.identifier.patentRegistrationNumber06716738-
dc.date.application2002-08-30-
dc.date.registration2004-04-06-
dc.publisher.countryUS-
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MS-Patent(특허)
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