DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Young Chul | ko |
dc.date.accessioned | 2022-12-15T09:01:58Z | - |
dc.date.available | 2022-12-15T09:01:58Z | - |
dc.identifier.uri | http://hdl.handle.net/10203/303081 | - |
dc.description.abstract | Provided are a tunable inter-digital capacitor (IDC) and a method of manufacturing the same. The tunable IDC includes: a first dielectric layer formed on a substrate and having electrode pattern grooves of an IDC including a ground line and a signal line formed therein; electrode metal patterns formed in the electrode pattern grooves of the IDC including the ground line and the signal line formed in the first dielectric layer; and a second dielectric layer formed on an upper surface of the first dielectric layer to cover all of the electrode metal patterns except for parts of the ground and signal lines. Therefore, it is possible to increase tunability of the IDC and reduce drive voltage. | - |
dc.title | Tunable inter-digital capacitor and method of manufacturing the same | - |
dc.title.alternative | 튜닝 가능한 인터-디지털 커패시터 및 동일한 것을 제조하는 방법 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 11789311 | - |
dc.identifier.patentRegistrationNumber | 07738237 | - |
dc.date.application | 2007-04-24 | - |
dc.date.registration | 2010-06-15 | - |
dc.publisher.country | US | - |
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