DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Beom-Sup | ko |
dc.contributor.author | Kim, Taehoon | ko |
dc.date.accessioned | 2022-12-13T03:00:56Z | - |
dc.date.available | 2022-12-13T03:00:56Z | - |
dc.identifier.uri | http://hdl.handle.net/10203/302889 | - |
dc.description.abstract | The present invention relates to a sigma-delta analog-to-digital converter using a mixed mode integrator composed of an analog integrator and a digital integrator, which can prevent the performance degradation due to the saturation of an integrator of the overload of a quantizer. A sigma-delta analog-to-digital converter having an anti-aliasing filter, a sample and hold circuit, a sigma-delta modulator and a decimation filter comprises an overload estimating unit for judging the saturation or overload of an analog integrator; a mixed mode integrator which has the analog integrator and a digital integrator composed of a digital adder and a digital storing unit and integrates the output of the overload estimating unit in analog or digitally; and a quantization unit for converting the output of the mixed mode integrator to a digital signal. | - |
dc.title | Sigma-delta analog-to-digital converter using mixed-mode integrator | - |
dc.title.alternative | 혼합 모드 적분기를 사용하는 시그마-델타 아날로그-디지털 변환기 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Kim, Beom-Sup | - |
dc.contributor.nonIdAuthor | Kim, Taehoon | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 09598625 | - |
dc.identifier.patentRegistrationNumber | 06424279 | - |
dc.date.application | 2000-06-21 | - |
dc.date.registration | 2002-07-23 | - |
dc.publisher.country | US | - |
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