Implementation of FPGA based undersampling receiver
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Singh, Ashish Kumar | ko |
| dc.contributor.author | 박성욱 | ko |
| dc.contributor.author | MINZ, LAXMIKANT | ko |
| dc.date.accessioned | 2022-11-23T08:01:48Z | - |
| dc.date.available | 2022-11-23T08:01:48Z | - |
| dc.date.created | 2022-11-23 | - |
| dc.date.issued | 2022-08-25 | - |
| dc.identifier.citation | 2022 정보통신설비 하계학술대회 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/300593 | - |
| dc.description.abstract | Receiver is an essential part of communication and remote sensing systems. It may consists of amplifier, filters, down-converter and ADC; which can convert the desired RF signal to digital data. FPGA based receiver modules are essential due to the necessity of high performance RF systems, and real-time signal processing [3]. The undersampling technique can be implemented to receive multiple multiband signals concurrently by choosing an appropriate sampling frequency | - |
| dc.language | English | - |
| dc.publisher | 사단법인 한국정보통신설비학회 | - |
| dc.title | Implementation of FPGA based undersampling receiver | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | 2022 정보통신설비 하계학술대회 | - |
| dc.identifier.conferencecountry | KO | - |
| dc.identifier.conferencelocation | 하이원 팰리스 호텔 | - |
| dc.contributor.localauthor | 박성욱 | - |
| dc.contributor.nonIdAuthor | Singh, Ashish Kumar | - |
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