DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Beom-Sup | ko |
dc.contributor.author | Yang, Jeong-Sik | ko |
dc.date.accessioned | 2022-11-17T12:01:02Z | - |
dc.date.available | 2022-11-17T12:01:02Z | - |
dc.identifier.uri | http://hdl.handle.net/10203/299867 | - |
dc.description.abstract | A low-power sense amplifier for a memory is provided, which includes a differential amplifier for sensing and amplifying a weak voltage signal of a bit line connected to a memory cell, and a latch amplifier for storing data inputted thereto, the latch amplifier being operated by the output signal of the differential amplifier, the sense amplifier including a bias means constructed of transistors which are included in the differential amplifier and turned on or turned off by a control signal, the transistors providing a load resistor component required for driving the differential amplifier when it is turned on, and a cutoff means for turning off the transistors constructing the bias means to stop the operation of the differential amplifier when there is a first logic state signal among the output signals of the latch amplifier. Accordingly, the low-power sense amplifier for a memory can perform high-speed sense amplification of bit line signal and prevent unnecessary power consumption. | - |
dc.title | Low-power sense amplifier for memory | - |
dc.title.alternative | 메모리용 저전력 감지 증폭기 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Kim, Beom-Sup | - |
dc.contributor.nonIdAuthor | Yang, Jeong-Sik | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 09337150 | - |
dc.identifier.patentRegistrationNumber | 06239624 | - |
dc.date.application | 1999-06-21 | - |
dc.date.registration | 2001-05-29 | - |
dc.publisher.country | US | - |
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