A 915 MHz IoT Transmitter Employing Frequency Tripler and Digitally Controlled Duty-Cycle/Phase Calibration

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dc.contributor.authorChoi, Kyung-Sikko
dc.contributor.authorKim, Keun-Mokko
dc.contributor.authorKo, Jinhoko
dc.contributor.authorLee, Sang-Gugko
dc.date.accessioned2022-11-04T06:00:49Z-
dc.date.available2022-11-04T06:00:49Z-
dc.date.created2022-05-30-
dc.date.created2022-05-30-
dc.date.issued2022-11-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.11, pp.3336 - 3347-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/299301-
dc.description.abstractA 915 MHz binary frequency-shift keying (BFSK) transmitter (TX) for Internet-of-Things (IoT) applications is presented. The proposed TX adopts a passive frequency tripler, digital duty-cycle/phase calibration, and a low-cost on-chip power amplifier (PA) matching network (MN). The frequency tripler allows an ultralow-power (ULP) implementation of the frequency synthesizer by lowering the maximum operating frequency and relaxing the frequency tuning range requirement. The proposed frequency tripler provides 10.6 dB better 300 MHz spur reduction compared to that of the conventional frequency tripler by adding a series high-pass filter. The two-phase 20% duty-cycle and single-ended 50% duty-cycle calibration circuits drive the frequency tripler and Class-D PA, respectively, suppressing unwanted spurs significantly. The digital duty-cycle/phase calibration circuits, designed based on the quantitative analysis of the stability, offer advantage of technology scaling. The reduced spur relaxes the harmonic filtering requirement at the PA output, leading to an on-chip PA MN with low-Q. Implemented in 55 nm CMOS, the proposed TX shows the peak output power of 5.2 dBm and efficiency of 30.6% over 902-928 MHz while dissipating 210 mu W in the phase-locked loop (PLL) for 0.9 V supply. All spur component levels stay below -41 dBm with the worst harmonic distortion of -48.5 dBc. The proposed TX achieves 100 kbps of data rate for the BFSK modulated signals with the corresponding FSK error of 3.2%.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA 915 MHz IoT Transmitter Employing Frequency Tripler and Digitally Controlled Duty-Cycle/Phase Calibration-
dc.typeArticle-
dc.identifier.wosid000795624200001-
dc.identifier.scopusid2-s2.0-85132517213-
dc.type.rimsART-
dc.citation.volume57-
dc.citation.issue11-
dc.citation.beginningpage3336-
dc.citation.endingpage3347-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2022.3172467-
dc.contributor.localauthorLee, Sang-Gug-
dc.contributor.nonIdAuthorKo, Jinho-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorRadio frequency-
dc.subject.keywordAuthorVoltage-controlled oscillators-
dc.subject.keywordAuthorSynthesizers-
dc.subject.keywordAuthorPower demand-
dc.subject.keywordAuthorFrequency synthesizers-
dc.subject.keywordAuthorFrequency shift keying-
dc.subject.keywordAuthorInductance-
dc.subject.keywordAuthorBinary frequency-shift keying (BFSK)-
dc.subject.keywordAuthorclass-D-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthorduty-cycle calibration-
dc.subject.keywordAuthorInternet-of-Things (IoT)-
dc.subject.keywordAuthorlow-power-
dc.subject.keywordAuthorpower amplifier (PA)-
dc.subject.keywordAuthortransmitter (TX)-
dc.subject.keywordPlusLOW-ENERGY TRANSMITTER-
dc.subject.keywordPlusEFFICIENCY-
dc.subject.keywordPlusCMOS-
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